Computer organization and design : (Record no. 2309)

MARC details
000 -LEADER
fixed length control field 08928cam a22004098a 4500
001 - CONTROL NUMBER
control field 6877477
003 - CONTROL NUMBER IDENTIFIER
control field BD-ChPU
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20120926130709.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 070525s2007 caua 000 0 eng
015 ## - NATIONAL BIBLIOGRAPHY NUMBER
National bibliography number GBA740761
Source bnb
016 7# - NATIONAL BIBLIOGRAPHIC AGENCY CONTROL NUMBER
Record control number 013755570
Source Uk
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780123706065 (pbk.)
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 0123706068 (pbk.)
035 ## - SYSTEM CONTROL NUMBER
System control number (OCoLC)ocn137312855
035 ## - SYSTEM CONTROL NUMBER
System control number (NNC)6877477
040 ## - CATALOGING SOURCE
Original cataloging agency UKM
Transcribing agency UKM
Modifying agency YDXCP
-- BAKER
-- EGM
-- OCLCQ
-- OrLoB-B
-- BD-ChPU
Language of cataloging ENG
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 004.21 P317c 2006
Edition number 22
090 ## - LOCALLY ASSIGNED LC-TYPE CALL NUMBER (OCLC); LOCAL CALL NUMBER (OCLC)
Classification number (OCLC) (R) ; Classification number, CALL (RLIN) (NR) QA76.9.C643
Local cutter number (OCLC) ; Book number/undivided call number, CALL (RLIN) P37 2007
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Patterson, David A.
9 (RLIN) 5333
245 10 - TITLE STATEMENT
Title Computer organization and design :
Remainder of title the hardware/software interface /
Statement of responsibility, etc David A. Patterson and John L. Hennessy.
250 ## - EDITION STATEMENT
Edition statement 3rd ed.
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc San Francisco, Calif. :
Name of publisher, distributor, etc Morgan Kaufmann ;
Place of publication, distribution, etc New Delhi :
Name of publisher, distributor, etc Elsevier Science [distributor],
Date of publication, distribution, etc 2006.
263 ## - PROJECTED PUBLICATION DATE
Projected publication date 200707
300 ## - PHYSICAL DESCRIPTION
Extent 621, 82, 16 p. :
Other physical details ill. ;
Dimensions 23 cm.
490 1# - SERIES STATEMENT
Series statement Morgan Kaufmann series in computer architecture and design
500 ## - GENERAL NOTE
General note Includes index.
505 00 - FORMATTED CONTENTS NOTE
Miscellaneous information Chapter 1.
Title Computer Abstractions and Technology --
Miscellaneous information 1.1.
Title Introduction --
Miscellaneous information 1.2.
Title Below Your Program --
Miscellaneous information 1.3.
Title Under the Covers --
Miscellaneous information 1.4.
Title Real Stuff: Manufacturing Pentium 4 Chips --
Miscellaneous information 1.5.
Title Fallacies and Pitfalls --
Miscellaneous information 1.6.
Title Concluding Remarks --
Miscellaneous information 1.7.
Title Historical Perspective and Further Reading --
Miscellaneous information 1.8.
Title Exercises --
-- Computers in the Real World: Information Technology for the 4 Billion without IT --
Miscellaneous information Chapter 2.
Title Instructions: Language of the Computer --
Miscellaneous information 2.1.
Title Introduction --
Miscellaneous information 2.2.
Title Operations of the Computer Hardware --
Miscellaneous information 2.3.
Title Operands of the Computer Hardware --
Miscellaneous information 2.4.
Title Representing Instructions in the Computer --
Miscellaneous information 2.5.
Title Logical Operations --
Miscellaneous information 2.6.
Title Instructions for Making Decisions --
Miscellaneous information 2.7.
Title Supporting Procedures in Computer Hardware --
Miscellaneous information 2.8.
Title Communicating with People --
Miscellaneous information 2.9.
Title MIPS Addressing for 32-Bit Immediates and Addresses --
Miscellaneous information 2.10.
Title Translating and Starting a Program --
Miscellaneous information 2.11.
Title How Compilers Optimize --
Miscellaneous information 2.12.
Title How Compilers Work: An Introduction --
Miscellaneous information 2.13.
Title A C Sort Example to Put It All Together --
Miscellaneous information 2.14.
Title Implementing an Object-Oriented Language --
Miscellaneous information 2.15.
Title Arrays versus Pointers --
Miscellaneous information 2.16.
Title Real Stuff: IA-32 Instructions --
Miscellaneous information 2.17.
Title Fallacies and Pitfalls --
Miscellaneous information 2.18.
Title Concluding Remarks --
Miscellaneous information 2.19.
Title Historical Perspective and Further Reading --
Miscellaneous information 2.20.
Title Exercises --
-- Computers in the Real World: Helping Save Our Environment with Data --
Miscellaneous information Chapter 3.
Title Arithmetic for Computers --
Miscellaneous information 3.1.
Title Introduction --
Miscellaneous information 3.2.
Title Signed and Unsigned Numbers --
Miscellaneous information 3.3.
Title Addition and Subtraction --
Miscellaneous information 3.4.
Title Multiplication --
Miscellaneous information 3.5.
Title Division --
Miscellaneous information 3.6.
Title Floating Point --
Miscellaneous information 3.7.
Title Real Stuff: Floating Point in the IA-32 --
Miscellaneous information 3.8.
Title Fallacies and Pitfalls --
Miscellaneous information 3.9.
Title Concluding Remarks --
Miscellaneous information 3.10.
Title Historical Perspective and Further Reading --
Miscellaneous information 3.11.
Title Exercises --
-- Computers in the Real World: Reconstructing the Ancient World --
Miscellaneous information Chapter 4.
Title Assessing and Understanding Performance --
Miscellaneous information 4.1.
Title Introduction --
Miscellaneous information 4.2.
Title CPU Performance and Its Factors --
Miscellaneous information 4.3.
Title Evaluating Performance --
Miscellaneous information 4.4.
Title Real Stuff: Two SPEC Benchmarks and the Performance of Recent Intel Processors --
Miscellaneous information 4.5.
Title Fallacies and Pitfalls --
Miscellaneous information 4.6.
Title Concluding Remarks --
Miscellaneous information 4.7.
Title Historical Perspective and Further Reading --
Miscellaneous information 4.8.
Title Exercises --
-- Computers in the Real World: Moving People Faster and More Safely --
Miscellaneous information Chapter 5.
Title The Processor: Datapath and Control --
Miscellaneous information 5.1.
Title Introduction --
Miscellaneous information 5.2.
Title Logic Design Conventions --
Miscellaneous information 5.3.
Title Building a Datapath --
Miscellaneous information 5.4.
Title A Simple Implementation Scheme --
Miscellaneous information 5.5.
Title A Multicycle Implementation --
Miscellaneous information 5.6.
Title Exceptions --
Miscellaneous information 5.7.
Title Microprogramming: Simplifying Control Design --
Miscellaneous information 5.8.
Title An Introduction to Digital Design Using a Hardware Design Language --
Miscellaneous information 5.9.
Title Real Stuff: The Organization of Recent Pentium Implementations --
Miscellaneous information 5.10.
Title Fallacies and Pitfalls --
Miscellaneous information 5.11.
Title Concluding Remarks --
Miscellaneous information 5.12.
Title Historical Perspective and Further Reading --
Miscellaneous information 5.13.
Title Exercises --
-- Computers in the Real World: Empowering the Disabled --
Miscellaneous information Chapter 6.
Title Enhancing Performance with Pipelining --
Miscellaneous information 6.1.
Title An Overview of Pipelining --
Miscellaneous information 6.2.
Title A Pipelined Datapath --
Miscellaneous information 6.3.
Title Pipelined Control --
Miscellaneous information 6.4.
Title Data Hazards and Forwarding --
Miscellaneous information 6.5.
Title Data Hazards and Stalls --
Miscellaneous information 6.6.
Title Control Hazards --
Miscellaneous information 6.7.
Title Using a Hardware Description Language to Describe and Model a Pipeline --
Miscellaneous information 6.8.
Title Exceptions --
Miscellaneous information 6.9.
Title Advanced Pipelining: Extracting More Performance --
Miscellaneous information 6.10.
Title Real Stuff: The Pentium 4 Pipeline --
Miscellaneous information 6.11.
Title Fallacies and Pitfalls --
Miscellaneous information 6.12.
Title Concluding Remarks --
Miscellaneous information 6.13.
Title Historical Perspective and Further Reading --
Miscellaneous information 6.14.
Title Exercises --
-- Computers in the Real World: Mass Communication without Gatekeepers --
Miscellaneous information Chapter 7.
Title Large and Fast: Exploiting Memory Hierarchy --
Miscellaneous information 7.1.
Title Introduction --
Miscellaneous information 7.2.
Title The Basics of Caches --
Miscellaneous information 7.3.
Title Measuring and Improving Cache Performance --
Miscellaneous information 7.4.
Title Virtual Memory --
Miscellaneous information 7.5.
Title A Common Framework for Memory Hierarchies --
Miscellaneous information 7.6.
Title Real Stuff: The Pentium P4 and the AMD Opteron Memory Hierarchies --
Miscellaneous information 7.7.
Title Fallacies and Pitfalls --
Miscellaneous information 7.8.
Title Concluding Remarks --
Miscellaneous information 7.9.
Title Historical Perspective and Further Reading --
Miscellaneous information 7.10.
Title Exercises --
-- Computers in the Real World: Saving the World's Art Treasures --
Miscellaneous information Chapter 8.
Title Storage, Networks, and Other Peripherals --
Miscellaneous information 8.1.
Title Introduction --
Miscellaneous information 8.2.
Title Disk Storage and Dependability --
Miscellaneous information 8.3.
Title Networks --
Miscellaneous information 8.4.
Title Buses and Other Connections between Processors, Memory, and I/O Devices --
Miscellaneous information 8.5.
Title Interfacing I/O Devices to the Processor, Memory, and Operating System --
Miscellaneous information 8.6.
Title I/O Performance Measures: Examples from Disk and File Systems --
Miscellaneous information 8.7.
Title Designing an I/O System --
Miscellaneous information 8.8.
Title Real Stuff: A Digital Camera --
Miscellaneous information 8.9.
Title Fallacies and Pitfalls --
Miscellaneous information 8.10.
Title Concluding Remarks --
Miscellaneous information 8.11.
Title Historical Perspective and Further Reading --
Miscellaneous information 8.12.
Title Exercises --
-- Computers in the Real World: Saving Lives through Better Diagnosis --
Miscellaneous information Chapter 9.
Title Multiprocessors and Clusters --
Miscellaneous information 9.1.
Title Introduction --
Miscellaneous information 9.2.
Title Programming Multiprocessors --
Miscellaneous information 9.3.
Title Multiprocessors Connected by a Single Bus --
Miscellaneous information 9.4.
Title Multiprocessors Connected by a Network --
Miscellaneous information 9.5.
Title Clusters --
Miscellaneous information 9.6.
Title Network Topologies --
Miscellaneous information 9.7.
Title Multiprocessors Inside a Chip and Multithreading --
Miscellaneous information 9.8.
Title Real Stuff: The Google Cluster of PCs --
Miscellaneous information 9.9.
Title Fallacies and Pitfalls --
Miscellaneous information 9.10.
Title Concluding Remarks --
Miscellaneous information 9.11.
Title Historical Perspective and Further Reading --
Miscellaneous information 9.12.
Title Exercises --
Miscellaneous information A.
Title Assemblers, Linkers, and the SPIM Simulator --
Miscellaneous information A.1.
Title Introduction --
Miscellaneous information A.2.
Title Assemblers --
Miscellaneous information A.3.
Title Linkers --
Miscellaneous information A.4.
Title Loading --
Miscellaneous information A.5.
Title Memory Usage --
Miscellaneous information A.6.
Title Procedure Call Convention --
Miscellaneous information A.7.
Title Exceptions and Interrupts --
Miscellaneous information A.8.
Title Input and Output --
Miscellaneous information A.9.
Title SPIM --
Miscellaneous information A.10.
Title MIPS R2000 Assembly Language --
Miscellaneous information A.11.
Title Concluding Remarks --
Miscellaneous information A.12.
Title Exercises --
Miscellaneous information B.
Title The Basics of Logic Design --
Miscellaneous information B.1.
Title Introduction --
Miscellaneous information B.2.
Title Gates, Truth Tables, and Logic Equations --
Miscellaneous information B.3.
Title Combinational Logic --
Miscellaneous information B.4.
Title Using a Hardware Description Language --
Miscellaneous information B.5.
Title Constructing a Basic Arithmetic Logic Unit --
Miscellaneous information B.6.
Title Faster Addition: Carry Lookahead --
Miscellaneous information B.7.
Title Clocks --
Miscellaneous information B.8.
Title Memory Elements: Flip-Flops, Latches, and Registers --
Miscellaneous information B.9.
Title Memory Elements: SRAMs and DRAMs --
Miscellaneous information B.10.
Title Finite-State Machines --
Miscellaneous information B.11.
Title Timing Methodologies --
Miscellaneous information B.12.
Title Field Programmable Devices --
Miscellaneous information B.13.
Title Concluding Remarks --
Miscellaneous information B.14.
Title Exercises --
Miscellaneous information C.
Title Mapping Control to Hardware --
Miscellaneous information C.1.
Title Introduction --
Miscellaneous information C.2.
Title Implementing Combinational Control Units --
Miscellaneous information C.3.
Title Implementing Finite-State Machine Control --
Miscellaneous information C.4.
Title Implementing the Next-State Function with a Sequencer --
Miscellaneous information C.5.
Title Translating a Microprogram to Hardware --
Miscellaneous information C.6.
Title Concluding Remarks --
Miscellaneous information C.7.
Title Exercises --
Miscellaneous information D.
Title A Survey of RISC Architectures for Desktop, Server, and Embedded Computers --
Miscellaneous information D.1.
Title Introduction --
Miscellaneous information D.2.
Title Addressing Modes and Instruction Formats --
Miscellaneous information D.3.
Title Instructions: The MIPS Core Subset --
Miscellaneous information D.4.
Title Instructions: Multimedia Extensions of the Desktop/Server RISCs --
Miscellaneous information D.5.
Title Instructions: Digital Signal-Processing Extensions of the Embedded RISCs --
Miscellaneous information D.6.
Title Instructions: Common Extensions to MIPS Core --
Miscellaneous information D.7.
Title Instructions Unique to MIPS-64 --
Miscellaneous information D.8.
Title Instructions Unique to Alpha --
Miscellaneous information D.9.
Title Instructions Unique to SPARC v.9 --
Miscellaneous information D.10.
Title Instructions Unique to PowerPC --
Miscellaneous information D.11.
Title Instructions Unique to PA-RISC 2.0 --
Miscellaneous information D.12.
Title Instructions Unique to ARM --
Miscellaneous information D.13.
Title Instructions Unique to Thumb --
Miscellaneous information D.14.
Title Instructions Unique to SuperH --
Miscellaneous information D.15.
Title Instructions Unique to M32R --
Miscellaneous information D.16.
Title Instructions Unique to MIPS-16 --
Miscellaneous information D.17.
Title Concluding Remarks.
526 ## - STUDY PROGRAM INFORMATION NOTE
Program name CSE
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer organization.
9 (RLIN) 5334
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element System design
General subdivision Data processing.
9 (RLIN) 5335
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer architecture.
9 (RLIN) 5321
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Hennessy, John L.
9 (RLIN) 5336
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
Uniform title Morgan Kaufmann series in computer architecture and design.
9 (RLIN) 5337
900 ## - EQUIVALENCE OR CROSS-REFERENCE-PERSONAL NAME [LOCAL, CANADA]
Numeration TOC
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme Dewey Decimal Classification
Koha item type Books
948 1# - LOCAL PROCESSING INFORMATION (OCLC); SERIES PART DESIGNATOR (RLIN)
Series part designator, SPT (RLIN) 20080916
b (OCLC) c
c (OCLC) rad1
d (OCLC) MPS
Holdings
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