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| 001 | 6877477 | ||
| 003 | BD-ChPU | ||
| 005 | 20120926130709.0 | ||
| 008 | 070525s2007 caua 000 0 eng | ||
| 015 | 
_aGBA740761 _2bnb  | 
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| 016 | 7 | 
_a013755570 _2Uk  | 
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| 020 | _a9780123706065 (pbk.) | ||
| 020 | _a0123706068 (pbk.) | ||
| 035 | _a(OCoLC)ocn137312855 | ||
| 035 | _a(NNC)6877477 | ||
| 040 | 
_aUKM _cUKM _dYDXCP _dBAKER _dEGM _dOCLCQ _dOrLoB-B _dBD-ChPU _bENG  | 
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| 082 | 0 | 4 | 
_a004.21 P317c 2006 _222  | 
| 090 | 
_aQA76.9.C643 _bP37 2007  | 
||
| 100 | 1 | 
_aPatterson, David A. _95333  | 
|
| 245 | 1 | 0 | 
_aComputer organization and design : _bthe hardware/software interface / _cDavid A. Patterson and John L. Hennessy.  | 
| 250 | _a3rd ed. | ||
| 260 | 
_aSan Francisco, Calif. : _bMorgan Kaufmann ; _aNew Delhi : _bElsevier Science [distributor], _c2006.  | 
||
| 263 | _a200707 | ||
| 300 | 
_a621, 82, 16 p. : _bill. ; _c23 cm.  | 
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| 490 | 1 | _aMorgan Kaufmann series in computer architecture and design | |
| 500 | _aIncludes index. | ||
| 505 | 0 | 0 | 
_gChapter 1. _tComputer Abstractions and Technology -- _g1.1. _tIntroduction -- _g1.2. _tBelow Your Program -- _g1.3. _tUnder the Covers -- _g1.4. _tReal Stuff: Manufacturing Pentium 4 Chips -- _g1.5. _tFallacies and Pitfalls -- _g1.6. _tConcluding Remarks -- _g1.7. _tHistorical Perspective and Further Reading -- _g1.8. _tExercises -- _tComputers in the Real World: Information Technology for the 4 Billion without IT -- _gChapter 2. _tInstructions: Language of the Computer -- _g2.1. _tIntroduction -- _g2.2. _tOperations of the Computer Hardware -- _g2.3. _tOperands of the Computer Hardware -- _g2.4. _tRepresenting Instructions in the Computer -- _g2.5. _tLogical Operations -- _g2.6. _tInstructions for Making Decisions -- _g2.7. _tSupporting Procedures in Computer Hardware -- _g2.8. _tCommunicating with People -- _g2.9. _tMIPS Addressing for 32-Bit Immediates and Addresses -- _g2.10. _tTranslating and Starting a Program -- _g2.11. _tHow Compilers Optimize -- _g2.12. _tHow Compilers Work: An Introduction -- _g2.13. _tA C Sort Example to Put It All Together -- _g2.14. _tImplementing an Object-Oriented Language -- _g2.15. _tArrays versus Pointers -- _g2.16. _tReal Stuff: IA-32 Instructions -- _g2.17. _tFallacies and Pitfalls -- _g2.18. _tConcluding Remarks -- _g2.19. _tHistorical Perspective and Further Reading -- _g2.20. _tExercises -- _tComputers in the Real World: Helping Save Our Environment with Data -- _gChapter 3. _tArithmetic for Computers -- _g3.1. _tIntroduction -- _g3.2. _tSigned and Unsigned Numbers -- _g3.3. _tAddition and Subtraction -- _g3.4. _tMultiplication -- _g3.5. _tDivision -- _g3.6. _tFloating Point -- _g3.7. _tReal Stuff: Floating Point in the IA-32 -- _g3.8. _tFallacies and Pitfalls -- _g3.9. _tConcluding Remarks -- _g3.10. _tHistorical Perspective and Further Reading -- _g3.11. _tExercises -- _tComputers in the Real World: Reconstructing the Ancient World -- _gChapter 4. _tAssessing and Understanding Performance -- _g4.1. _tIntroduction -- _g4.2. _tCPU Performance and Its Factors -- _g4.3. _tEvaluating Performance -- _g4.4. _tReal Stuff: Two SPEC Benchmarks and the Performance of Recent Intel Processors -- _g4.5. _tFallacies and Pitfalls -- _g4.6. _tConcluding Remarks -- _g4.7. _tHistorical Perspective and Further Reading -- _g4.8. _tExercises -- _tComputers in the Real World: Moving People Faster and More Safely -- _gChapter 5. _tThe Processor: Datapath and Control -- _g5.1. _tIntroduction -- _g5.2. _tLogic Design Conventions -- _g5.3. _tBuilding a Datapath -- _g5.4. _tA Simple Implementation Scheme -- _g5.5. _tA Multicycle Implementation -- _g5.6. _tExceptions -- _g5.7. _tMicroprogramming: Simplifying Control Design -- _g5.8. _tAn Introduction to Digital Design Using a Hardware Design Language -- _g5.9. _tReal Stuff: The Organization of Recent Pentium Implementations -- _g5.10. _tFallacies and Pitfalls -- _g5.11. _tConcluding Remarks -- _g5.12. _tHistorical Perspective and Further Reading -- _g5.13. _tExercises -- _tComputers in the Real World: Empowering the Disabled -- _gChapter 6. _tEnhancing Performance with Pipelining -- _g6.1. _tAn Overview of Pipelining -- _g6.2. _tA Pipelined Datapath -- _g6.3. _tPipelined Control -- _g6.4. _tData Hazards and Forwarding -- _g6.5. _tData Hazards and Stalls -- _g6.6. _tControl Hazards -- _g6.7. _tUsing a Hardware Description Language to Describe and Model a Pipeline -- _g6.8. _tExceptions -- _g6.9. _tAdvanced Pipelining: Extracting More Performance -- _g6.10. _tReal Stuff: The Pentium 4 Pipeline -- _g6.11. _tFallacies and Pitfalls -- _g6.12. _tConcluding Remarks -- _g6.13. _tHistorical Perspective and Further Reading -- _g6.14. _tExercises -- _tComputers in the Real World: Mass Communication without Gatekeepers -- _gChapter 7. _tLarge and Fast: Exploiting Memory Hierarchy -- _g7.1. _tIntroduction -- _g7.2. _tThe Basics of Caches -- _g7.3. _tMeasuring and Improving Cache Performance -- _g7.4. _tVirtual Memory -- _g7.5. _tA Common Framework for Memory Hierarchies -- _g7.6. _tReal Stuff: The Pentium P4 and the AMD Opteron Memory Hierarchies -- _g7.7. _tFallacies and Pitfalls -- _g7.8. _tConcluding Remarks -- _g7.9. _tHistorical Perspective and Further Reading -- _g7.10. _tExercises -- _tComputers in the Real World: Saving the World's Art Treasures -- _gChapter 8. _tStorage, Networks, and Other Peripherals -- _g8.1. _tIntroduction -- _g8.2. _tDisk Storage and Dependability -- _g8.3. _tNetworks -- _g8.4. _tBuses and Other Connections between Processors, Memory, and I/O Devices -- _g8.5. _tInterfacing I/O Devices to the Processor, Memory, and Operating System -- _g8.6. _tI/O Performance Measures: Examples from Disk and File Systems -- _g8.7. _tDesigning an I/O System -- _g8.8. _tReal Stuff: A Digital Camera -- _g8.9. _tFallacies and Pitfalls -- _g8.10. _tConcluding Remarks -- _g8.11. _tHistorical Perspective and Further Reading -- _g8.12. _tExercises -- _tComputers in the Real World: Saving Lives through Better Diagnosis -- _gChapter 9. _tMultiprocessors and Clusters -- _g9.1. _tIntroduction -- _g9.2. _tProgramming Multiprocessors -- _g9.3. _tMultiprocessors Connected by a Single Bus -- _g9.4. _tMultiprocessors Connected by a Network -- _g9.5. _tClusters -- _g9.6. _tNetwork Topologies -- _g9.7. _tMultiprocessors Inside a Chip and Multithreading -- _g9.8. _tReal Stuff: The Google Cluster of PCs -- _g9.9. _tFallacies and Pitfalls -- _g9.10. _tConcluding Remarks -- _g9.11. _tHistorical Perspective and Further Reading -- _g9.12. _tExercises -- _gA. _tAssemblers, Linkers, and the SPIM Simulator -- _gA.1. _tIntroduction -- _gA.2. _tAssemblers -- _gA.3. _tLinkers -- _gA.4. _tLoading -- _gA.5. _tMemory Usage -- _gA.6. _tProcedure Call Convention -- _gA.7. _tExceptions and Interrupts -- _gA.8. _tInput and Output -- _gA.9. _tSPIM -- _gA.10. _tMIPS R2000 Assembly Language -- _gA.11. _tConcluding Remarks -- _gA.12. _tExercises -- _gB. _tThe Basics of Logic Design -- _gB.1. _tIntroduction -- _gB.2. _tGates, Truth Tables, and Logic Equations -- _gB.3. _tCombinational Logic -- _gB.4. _tUsing a Hardware Description Language -- _gB.5. _tConstructing a Basic Arithmetic Logic Unit -- _gB.6. _tFaster Addition: Carry Lookahead -- _gB.7. _tClocks -- _gB.8. _tMemory Elements: Flip-Flops, Latches, and Registers -- _gB.9. _tMemory Elements: SRAMs and DRAMs -- _gB.10. _tFinite-State Machines -- _gB.11. _tTiming Methodologies -- _gB.12. _tField Programmable Devices -- _gB.13. _tConcluding Remarks -- _gB.14. _tExercises -- _gC. _tMapping Control to Hardware -- _gC.1. _tIntroduction -- _gC.2. _tImplementing Combinational Control Units -- _gC.3. _tImplementing Finite-State Machine Control -- _gC.4. _tImplementing the Next-State Function with a Sequencer -- _gC.5. _tTranslating a Microprogram to Hardware -- _gC.6. _tConcluding Remarks -- _gC.7. _tExercises -- _gD. _tA Survey of RISC Architectures for Desktop, Server, and Embedded Computers -- _gD.1. _tIntroduction -- _gD.2. _tAddressing Modes and Instruction Formats -- _gD.3. _tInstructions: The MIPS Core Subset -- _gD.4. _tInstructions: Multimedia Extensions of the Desktop/Server RISCs -- _gD.5. _tInstructions: Digital Signal-Processing Extensions of the Embedded RISCs -- _gD.6. _tInstructions: Common Extensions to MIPS Core -- _gD.7. _tInstructions Unique to MIPS-64 -- _gD.8. _tInstructions Unique to Alpha -- _gD.9. _tInstructions Unique to SPARC v.9 -- _gD.10. _tInstructions Unique to PowerPC -- _gD.11. _tInstructions Unique to PA-RISC 2.0 -- _gD.12. _tInstructions Unique to ARM -- _gD.13. _tInstructions Unique to Thumb -- _gD.14. _tInstructions Unique to SuperH -- _gD.15. _tInstructions Unique to M32R -- _gD.16. _tInstructions Unique to MIPS-16 -- _gD.17. _tConcluding Remarks.  | 
| 526 | _aCSE | ||
| 650 | 0 | 
_aComputer organization. _95334  | 
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| 650 | 0 | 
_aSystem design _xData processing. _95335  | 
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| 650 | 0 | 
_aComputer architecture. _95321  | 
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| 700 | 1 | 
_aHennessy, John L. _95336  | 
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| 830 | 0 | 
_aMorgan Kaufmann series in computer architecture and design. _95337  | 
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| 900 | _bTOC | ||
| 942 | 
_2ddc _cBK  | 
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| 948 | 1 | 
_a20080916 _bc _crad1 _dMPS  | 
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| 999 | 
_c2309 _d2309  | 
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