000			01099cam a22002774a 4500
003			BD-ChPU
005			20150505162134.0
008			060227s2006 ne a b 001 0 eng
020			_a9789380501550
040			_aDLC _cDLC _dBAKER _dC#P _dIXA _dDLC _dBD-ChPU _bENG
082	0	0	_a621.395 V865 2011 _222
245	0	0	_aVLSI Test Principles and Architectures : _bDesign for Testability / _cedited by Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen.
260			_aIndia : _bSanat Printers, _c2011[Reprint].
300			_axxx, 777 p. : _bill. ; _c25 cm.
440		4	_aThe Morgan Kaufmann series in systems on silicon
504			_aIncludes bibliographical references and index.
526			_aComputer Science and Engineering, Electrical and Electronics Engineering
650		0	_aIntegrated circuits _xVery large scale integration _xTesting.
650		0	_aIntegrated circuits _xVery large scale integration _xDesign.
700	1		_aWang, Laung-Terng.
700	1		_aWu, Cheng-Wen, _cEE Ph. D.
700	1		_aWen, Xiaoqing.
856	4	1	_3Table of contents
856	4	2	_3Publisher description
942			_2ddc _cBK
999			_c4123 _d4123